Objectives of the project
The main objective of the SPICES project is to produce an integrated methodology for the design, verification and implementation of critical real-time systems in the avionics domains. A crucial project dimension is the ability to cope with to assess on paper that it is properly designed and will meet all its functional and non-functional requirements such as real-time behaviour and safety constraints. Consequently, software architects and designers of mission-critical RT/E systems need early validation techniques coupled with a formal, non-ambiguous and sufficiently informative description of the future system – in other words, a consistent model. Moreover, they need to be able to ensure that the code that will actually run on the targeted hardware is consistent with the validated models.
The SPICES project answers this strong industrial need based on the AADL (Architecture Analysis and Design Language) framework. SPICES aims at developing an MDD/MDE-compliant tool suite for the design, verification and development of mission-critical RT/E systems dedicated to the aerospace industry. The tool suite will be based on the architecture analysis and design language (AADL), formal methods, the lightweight common object request broker architecture (CORBA) component model (CCM) and the SystemC system description language, and will target both general-purpose processors and reconfigurable hardware. SPICES modelling, verification and code generation tools will be integrated in the open-source Eclipse platform, more precisely TOPCASED.
Other key project objectives for reaching industrial adoption are the language standardisation and the integration in certification process such as DO-178B.
The contribution of CETIC is upstream in the development process, at the transition between requirements engineering and architectural levels, especially related to the identification and traceability of critical properties and also the way to derive some initial AADL models. This work is a direct application of the FAUST toolset to this domain.
- Consolidated AADL methodology (with formal semantics, increased expressiveness) and industrially applicable in link both with downstream (SystemC, CCM) and upstream methodologies (requirements engineering)
- Ecosystem of integrated tools supporting various key aspects of the methodology: ADELE (AADL graphical layer), ADES (AADL behavioral layer), FAUST (requirements engineering), OSSATE (AADL kernel), MAST (schedulability analysis), SoftExplorer (power analysis)
- Language standardisation and integration in the certification process.
- Industrially validated methodology for designing embedded systems; based on an architectural concept and integrated with industrial standards.
- Availability of an integrated tool suite supporting key activities for the design of critical embedded systems, especially for the aeronautic domain but also the automotive domain.
- Eased adoption thanks to the use of open standard and tool technologies.
Appreciation of the project for the companies
Airbus, Axlog, Barco, CEA-List, Feria, K.U. Leuven, Université de Bretagne Sud, SQS, TCP/SI, Thalès Avionics/Communication France, Universidad de Cantabria, Verimag