POLCA final press release

POLCA final press release

A Rich and Promising Toolset for Easier Programmability of Heterogeneous Systems

With the POLCA programming model and tool set, programmers find a practical and easier way to adapt their application to fit various hardware targets and get better performance at lower power consumption.

Date: 8 November 2016


Scalability of embedded systems and IoT networks 

Domaine: Software industry 

About project: POLCA 

Contact : Lotfi Guedria

Today, we are at the end of the POLCA project (Programming Large Scale Heterogeneous Infrastructure), and the POLCA consortium is glad to announce the achievements accomplished by its partners with the release of the following concrete assets:

  • The POLCA programming model: a annotation based approach to express the mathematical nature of the computations expressed in imperative languages.
  • A rich set of tools, released as open source, which enables code generation, analysis, adaptation and transformation.
  • Generate code for a wide range of hardware architectures including CPUs, GPUs, FPGAs and DSPs.
  • Sample applications and documentation illustrating the usage of the programming model and the tools
POLCA compilation and transformation process

“The POLCA tools help to turn existing standard, off-the-shelf sequential code into parallel code where different optimization strategies, such as regular (task-oriented) parallelism and pipelining are automatically uncovered and exploited. We evaluated the programming model and tools when implementing computer vision as example application for our FlexaWare many-core hardware platform. The POLCA tools showed a promising potential for faster application development” says Gerard Rauwerda, co-founder and CTO of Recore Systems

“The approach and toolset delivered by POLCA is very promising from the perspective of a developer who would be interested in exploiting the potential of our platform while reducing the associated learning curve of developing in MaxJ. POLCA, by facilitating transformation and generation of code for our MaxJ compiler, gives a simple way for a non-specialized user to quickly get operational with our platform. We see this as a real value proposition that we can suggest to new customers” says Georgi Gaydadjiev, VP of Dataflow Software Engineering .

“Compared to other available programming models, the one developed in POLCA presents the advantage of enabling higher level code transformation, adaptation to heterogeneous systems and portability across different systems thanks to the associated hierarchical structure understanding and mathematical transformations. HLRS will clearly benefit from those features.” says Daniel Rubio Bonilla from the High Performance Computing Center Stuttgart (HLRS) , one of the main designers of the POLCA programming model.

“Although FPGA hardware accelerators present an exciting potential for a wide range of applications, they still remain quite complex to program and operate by a non-specialised users or developers. Compared to GPUs, the process of exploiting them is relatively less automated and generic. POLCA allowed us to somehow tackle this complexity; By developing the Poroto tool, we contribute to ease and accelerate the process of developing and tuning applications that benefit from FPGA computation offloading” Says Lotfi Guedria, Deputy manager of the embedded and communication systems department at CETIC .

“A main achievement of the POLCA project is providing users and programmers of heterogeneous systems with effective tools that help them to be more productive and enable them to explore different adaptations of their application to their hardware targets. We are proud of having contributed to that effort with our Source2Source and machine learning tools laying at the heart of the POLCA toolset” Says Manuel Carro, Deputy Director of the IMDEA Software Institute .

Two highly innovative spin-offs are emerging thanks to the research conducted in POLCA

The advancements achieved gave birth to two spin-offs leveraging the potential of commercial exploitation of the project results.

First, QBayLogic, a spin-off from the University of Twente was created in early July 2016 and will offer design services associated with applying FPGA technology in domains with difficult mathematical problems. The spin-off is relying strongly on its expertise with Haskell and Clash frameworks and the associated new tools, extensions and concepts developed during POLCA project.

“Coming from a long academic career, I am now very excited of taking part of this promising undertaking. I see a huge potential in the industry for exploiting tools and concepts like those we developed in POLCA to address the programmability and productivity challenges of complex systems” Says Jan Kuper, Professor at University of Twente and Co-founder of QBayLogic spin-off .

Second, the University of Ulm is in the process of starting a spin-off that will bring in the programming concepts from POLCA to their in-house operating system, thus supporting a wide range of hardware types. The spin-off will offer the full stack of a modular embedded systems solution.

“POLCA allowed us to realise an embedded system solution that is easy to use and fully modular on all levels. By being able to easily integrate all types of resources, including sensors and actors easily, we have a strong competitive advantage for our spin-off project” Says Lutz Schubert, Head of Research at University of Ulm, coordinator of the POLCA project and co-founder of the spin-off .

About the EU FP7 project POLCA

The POLCA project (Programming Large Scale Heterogeneous Infrastructure) was started in September 2013 with the aim of addressing the complex programmability challenge for the ever-spreading heterogeneous systems in both areas: embedded and high performance computing. The research conducted in POLCA proposed a sound innovative approach that put primary focus on defining and enabling high level, mathematically based transformations of the target application code along and a full path for interfacing to the different lower level backend compilers that are specific for each target hardware platform.

The project consortium brought together academic and industrial experts in the fields of HPC and embedded systems. The project was led by the German University of Ulm. Partnership included The High Performance Computing Center Stuttgart (HLRS) of the University of Stuttgart, the Dutch University of Twente, the Spanish “Universidad Politécnica de Madrid”, the Belgium “Centre of Excellence in Information and Communication Technologies” (CETIC), the Spanish “IMDEA Software Institute”, the British computing platform manufacturer “MAXELER Technologies”, as well as the fabless semiconductor company “RECORE Systems” from the Netherlands.

For more information please check out http://www.polca-project.eu .
You can also contact the project coordinator Lutz Schubert lutz.schubert(at)uni-ulm.de or the project contact at CETIC, Lotfi Guedria


As an applied research centre in the field of ICT, CETIC’s mission is to support economic development by transferring the results of the most innovative research in ICT to companies, particularly SMEs. The knowledge developed by CETIC is made available to companies to help them integrate these technological breakthroughs into their products, processes and services, enabling them to innovate faster, save time and money and develop new markets. CETIC is based in Charleroi, Belgium.
More information: www.cetic.be.