A High Performance FPGA-Based Accelerator for BLAS Library Implementation

A High Performance FPGA-Based Accelerator for BLAS Library Implementation

S. Rousseaux, D. Hubaux, P. Guisset, J.-D. Legat, "A High Performance FPGA-Based Accelerator for BLAS Library Implementation", Proceeding of the Reconfigurable Systems Summer Institute 2007, RSSI 07, July 2007.

Date: 1er juillet 2007

Publication: Communication scientifique 

A propos du projet: CANAPE 

Auteur : Damien Hubaux