System Description
The system can be divided into three different modules : the hardware, the soft processor and the the µClinux.
Hardware
Hardware is the very first layer of the system. It is an electronic board with an FPGA as main component. The FPGA is the core component that can be seen as a Central Processing Unit. CETIC chose a 12,000 logic gates FPGA from Altera’s Cyclone series. All around the FPGA, several components provide flexibility and extensions to this CPU, such as :
32MBytes flash memory for non-volatile data storage 16MBytes SDRAM used as working memory hardware watchdog to reset the system in case of deadlocks 4Mbits EPCS flash memory to store FPGA configuration several I/O pins offering extension opportunities
The board has been designed as a motherboard on which daughterboards can be stacked. The motherboard (also called CPU board) is intended to perform all processing and storage tasks while daughterboards (also called extension boards) are meant to provide connectivity to the system.
Ensuring maximal flexibility at minimal costs, the CPU board is a complex high density board while the extension boards are low-costs connectivity PCB.
CETIC is currently developing two different compatible daughter boards :
on one hand, a connectivity board including WiFi, Bluetooth, GPS, USB and serial communications and on the other hand, an « automotive » board including an OBD connection (data bus used in most European cars) and an FMS connection (CAN extension used in trucks).
Soft Processor
A processor is called « soft » when it is implemented in reconfigurable logic such as an FPGA. Soft processors ensure a high flexibility and reconfigurability since they are implemented as VHDL blocks inside the FPGA. It is easy to add a serial port, or a USB MAC layer in the FPGA without changing anything to the board, but only changing the configuration of the FPGA. CETIC uses Altera’s NiosII softprocessor which is known for its fast integration. Specific tools offer a very user-friendly interface to design the soft processor. Once finished with the design tool, a VHDL file is generated to be programmed inside the FPGA.
An open source environment based on Eclipse IDE is available to develop embedded software for the Nios2 processor that has been generated.
The configuration of the FPGA (including the soft processor) is kept in a special flash memory used at boot time. This means that the processor can modify its own configuration in flash memory so that a new processor can be started at next startup.
Another advantage of the technology is the possibility to instantiate several processors within the same FPGA. The current board accepts up to 6 processors to be created inside the FPGA. This provides large research opportunities on grid computing and inter-processor communications.
µClinux
µClinux is a lightweight version of the well known operating system Linux. This version was designed for microcontrollers and small processors without MMU (Memory Management Unit). Some specific restrictions apply when using a non-MMU processor like the Nios2. The main concern is about the management of memory and the lack of memory protection. This implies strong coding rules and high software quality when designing embedded applications for µClinux.
Use of µClinux provides lots of advantages compared to plain C applications : free open source environment many existing applications many existing drivers community support
Applications
The main advantage of this system is its flexibility. The modular design allows an infinite amount of applications with only few modifications. This is why the system can be used in various applications. CETIC installed SANDs as part of a project with KeyDriving Competences with the objective of teaching truck drivers an economic way of driving (see news).
Many other applications can be covered with this system thanks to the association of Linux and reconfigurable hardware.
CETIC successfully tested wireless hardware reconfiguration which turns out to be useful when working on mobile systems. Applications where several FPGA configurations are loaded depending on the end functionnality can also be developed to optimise power consumption.