CETIC

CETIC wins the 2nd LANTRONIX Annual Wireless Design Contest in San Jose (CA)

Damien HUBAUX — 2009-04-20T12:11:03Z

CETIC wins first prise in the 2nd Annual Wireless Design Contest with its SAND (Smart Adaptable Network Device) topping more than 200 contestants. Considered the most innovative entry of the contest organised by the american company LANTRONIX, The SAND proposes an intelligent embedded solution for fast, custom prototyping. CETIC was present at the LANTRONIX's booth during the « Embedded Systems Conference Silicon Valley » on April 4th in San Jose, California to show the winning device and to collect the $6.000,00 US prise money.

More information about CETIC : www.cetic.be

More information about LANTRONIX : www.lantronix.com (The Wireless Design Contest)

20. Wireless technologies

Philippe Drugmand — 2009-03-09T15:44:14Z

CETIC has developed a strong expertise in wireless technologies. These fast growing technologies offer a multitude of opportunities that could not be envisioned up to now. Many equipments can benefit from a suitable connection taking into account their particular constraints.

In the scope of embedded systems, CETIC can rapidly integrate wireless technologies such as WiFi, Bluetooth, Zigbee, GSM, GPRS, 3G,... by using commercially available components. The added value of CETIC consists of its capabilities in rapid prototyping thanks to its generic platforms and its expertise in embedded software for smart devices.

40. Escrow audit

Philippe Drugmand — 2009-03-09T15:39:42Z

CETIC realises technical audits of Escrow material (source code, hardware design, procedures,...).

The Escrow service consists of a deposit of source code or other design documents or procedures at a third party's premises in order to guarantee the customer against a default risk of its provider. The Escrow contract defines the conditions for a possible release of the deposit to the customer (typically a bankruptcy, company buyout or a support failure of the provider). A client may require a source code Escrow if the envisioned product is strategic for its activities and/or if the provider cannot offer sufficient guarantees about its support capabilities or its financial health. Most Escrow agents are able to safely manage the deposit, but it may be really complex to guarantee that the deposit - if used by the customer - will allow to build the real product and will permit to insure the complete development process for further evolutions. CETIC acts as an Escrow agent to technically audit the Escrow material (source code, hardware design, procedures,...). Especially for complex systems, when the product is not only a simple software product relying on standard hardware and middleware components, it may be impossible to simply rebuild and test the product at deposit time due to the expenses required by hardware manufacturing for example. In this case, CETIC is able to check the documents and procedures of the deposit, including the hardware design files as Gerber files, to ensure their consistency, their completeness and their correctness (vs. a reference product).

As an independent research centre and a non profit organization, CETIC is recognised as an technical expert in embedded systems and also as a trustworthy escrow agent by customers and providers; it protects the Intellectual Property of the provider and gives accurate information to the customer about the usability of the deposit.

µClinux in a Soft Processor

Damien HUBAUX — 2007-04-12T13:46:28Z

The Electronic System team developed a complete embedded platform based on an FPGA with a soft processor running Linux. The project codename is SAND, standing for Smart Adaptable Networking Device. This system offers strong prototyping capacities in various applications.

System Description

The system can be divided into three different modules : the hardware, the soft processor and the the µClinux.

Hardware

Hardware is the very first layer of the system. It is an electronic board with an FPGA as main component. The FPGA is the core component that can be seen as a Central Processing Unit. CETIC chose a 12,000 logic gates FPGA from Altera's Cyclone series. All around the FPGA, several components provide flexibility and extensions to this CPU, such as :
32MBytes flash memory for non-volatile data storage
16MBytes SDRAM used as working memory
hardware watchdog to reset the system in case of deadlocks
4Mbits EPCS flash memory to store FPGA configuration
several I/O pins offering extension opportunities

The board has been designed as a motherboard on which daughterboards can be stacked. The motherboard (also called CPU board) is intended to perform all processing and storage tasks while daughterboards (also called extension boards) are meant to provide connectivity to the system. Ensuring maximal flexibility at minimal costs, the CPU board is a complex high density board while the extension boards are low-costs connectivity PCB. CETIC is currently developing two different compatible daughter boards : on one hand, a connectivity board including WiFi, Bluetooth, GPS, USB and serial communications and on the other hand, an « automotive » board including an OBD connection (data bus used in most European cars) and an FMS connection (CAN extension used in trucks).

Soft Processor

A processor is called « soft » when it is implemented in reconfigurable logic such as an FPGA. Soft processors ensure a high flexibility and reconfigurability since they are implemented as VHDL blocks inside the FPGA. It is easy to add a serial port, or a USB MAC layer in the FPGA without changing anything to the board, but only changing the configuration of the FPGA. CETIC uses Altera's NiosII softprocessor which is known for its fast integration. Specific tools offer a very user-friendly interface to design the soft processor. Once finished with the design tool, a VHDL file is generated to be programmed inside the FPGA. An open source environment based on Eclipse IDE is available to develop embedded software for the Nios2 processor that has been generated. The configuration of the FPGA (including the soft processor) is kept in a special flash memory used at boot time. This means that the processor can modify its own configuration in flash memory so that a new processor can be started at next startup. Another advantage of the technology is the possibility to instantiate several processors within the same FPGA. The current board accepts up to 6 processors to be created inside the FPGA. This provides large research opportunities on grid computing and inter-processor communications.

µClinux

µClinux is a lightweight version of the well known operating system Linux. This version was designed for microcontrollers and small processors without MMU (Memory Management Unit). Some specific restrictions apply when using a non-MMU processor like the Nios2. The main concern is about the management of memory and the lack of memory protection. This implies strong coding rules and high software quality when designing embedded applications for µClinux. Use of µClinux provides lots of advantages compared to plain C applications :
free open source environment
many existing applications
many existing drivers
community support

Applications

The main advantage of this system is its flexibility. The modular design allows an infinite amount of applications with only few modifications. This is why the system can be used in various applications. CETIC installed SANDs as part of a project with KeyDriving Competences with the objective of teaching truck drivers an economic way of driving (see news). Many other applications can be covered with this system thanks to the association of Linux and reconfigurable hardware.

CETIC successfully tested wireless hardware reconfiguration which turns out to be useful when working on mobile systems. Applications where several FPGA configurations are loaded depending on the end functionnality can also be developed to optimise power consumption.

Hardware design and modelling

Damien HUBAUX — 2005-05-04T07:25:03Z

CETIC also handles the implementation of hardware on FPGA. Beyond the knowledge of the design flow based on current Hardware Description Languages (HDL), CETIC has developed a strong know-how using SystemC. This language, which makes the link between the HDL's and C++, is particularly suitable for electronic system modelling and the generation of an executable specification which is used as a reference for the (...) - 10. Embedded & Programmable Systems

« Soft » processors

Damien HUBAUX — 2005-05-04T07:24:50Z

CETIC masters the technology of embedded processor for FPGAs, which opens promising capabilities. CETIC helps companies who need to integrate such processors within their FPGAs. Beside the programmable logic which is very competitive for computation intensive applications and hardware acceleration, the processor offers software flexibility and allows to efficiently handle complex tasks such as (...) - 10. Embedded & Programmable Systems

Development of embedded systems

Damien HUBAUX — 2005-05-04T07:24:32Z

Cetic has the ability to develop embedded electronic systems meeting the needs of the industry, in the field of research and development (prototyping). The design flow covers the user needs evaluation, the (elaboration of) specifications, the system design and the implementation of the embedded code or the operating system. - 10. Embedded & Programmable Systems

General purpose FPGA board

Damien HUBAUX — 2005-05-03T10:04:06Z

CETIC has developed a general purpose FPGA board, which includes volatile memory (RAM), non-volatile memory (Flash), power and programmable input/output. This board is equipped with a programmable 32-bit processor, running µcLinux.

With this board, CETIC satisfies partner needs concerning the implementation of programmable embedded systems with a ready-to-use platform. This board fits numerous purposes in a fast and efficient way.

The typical usage scenarios of this board include prototyping, feasibility studies and validation. This board is indeed designed to be open to a wide range of applications.

Its main characteristics are:
EP1C6 cost-effective FPGA (up to EP1C12)
32-bit Nios II soft processor (up to 100 Mhz) ucLinux ready
16 MB Fast SDRAM
32 MB CFI Flash
Input voltage: 5 - 40 V
On board 1.5V and 3.3V regulated
56 user I/O


General purpose FPGA board (8x5 cm)